Remember to Enable MMU Cache in #RISCV T-Head C906! (#Ox64 BL808 / #MilkV Duo S SG2000) ... Otherwise things get super slooooooow 😬
Article: https://lupyuen.github.io/articles/plic3#appendix-mmu-caching-for-t-head-c906
#Pine64 Quartz64 Zero: $15 SBC with RK3566 and 1GB RAM
https://liliputing.com/pine64-quartz64-zero-is-a-15-single-board-pc-with-rk3566-and-1gb-ram/
"when it comes to the algorithm problems after 2021, #ChatGPT’s ability to generate functionally correct code is affected. It sometimes fails to understand the meaning of questions, even for easy level problems"
Official QEMU Emulator for #ESP32
#MilkV Duo S: "A new #RISCV toy... requiring almost no tinkering"
https://gwolf.org/2024/06/a-new-risc-v-toy-requiring-almost-no-tinkering.html
"State Micro’s SM486s are clearly an exact replica of Intel’s 486 CPUs ... It remains unclear how State Micro obtained Intel’s 486 IPs"
https://x86.fr/investigating-ssmecs-state-micro-486s-with-the-uca/
"Kiasunomics 2: Economic Insights For Everyday Life" (#Singapore)
#alt4you Screenshot from the linked repo, text: "Creating the SG2000 Emulator... Doesn’t look so hard?
Yeah I'm begging all RISC-V SoC Makers: Please provide a Software Emulator for your RISC-V SoC! A
Just follow the steps in this article to create your RISC- V Emulator. Some SoC Peripherals might be missing, but a Barebones Emulator is still super helpful for porting, booting and testing any Operating System."
@lupyuen
@lupyuen So true. Honestly, I think there should at least be a minimal emulator for every SoC. It helps a lot with operating system development.
@lupyuen maybe I should persuade all SoCs with PCIe to implement PCIe-CPU coherency (because currently Linux in-tree GPU drivers require it)
IoT Techie and Educator / Apache NuttX PMC