Silicon Underground (Dave F)

On April 2, 1997, AMD released a new CPU. If it succeeded, AMD had a chance at success. If it failed, AMD would probably fail with it. That CPU was the K6, and it revitalized AMD, letting them move to the middle of the market, where margins were high enough to fund its future CPUs. #RetroComputing #TechHistory #ComputerArchitecture #Innovation #TechMilestones #1990sTech dfarq.homeip.net/amd-k6-releas

AMD K6 released April 2, 1997

It allowed AMD to move into the more lucrative middle…

The Silicon Underground
Cristian

¿Algún experto en sistemas operativos o en arquitectura de computadores me puede comprobar que este diagrama es correcto? Lo acabo de crear en @drawio partiendo de varios gráficos de "Sistemas Operativos" de Gary Nutt (Ed. Pearson).

¡Mil gracias!

#OS #computerarchitecture #software #hardware

Apr 01, 2025, 16:51 · · · 3 · 0
Watson Tech World

One of the best interviews on AI and GPUs I've every seen was posted earlier today. Jensen Huang is really super smart in my opinion, and I think this interview is definitely worth watching. I can understand how it was a person like him who turned NVIDIA into a company with a market cap more than 1 trillion USD.

Jensen Huang on GPUs - Computerphile
youtube.com/watch?v=G6R7UOFx1bw

#NVIDIA #GPU #AI #CUDA #CPU #JensenHuang #ComputerArchitecture

- YouTube

Enjoy the videos and music you love, upload original…

www.youtube.com
Jure Repinc :linux: :kde:

Inside SiFive’s P550 Microarchitecture
🔗 old.chipsandcheese.com/2025/01

"The P550 is a 3-wide out-of-order core with a 13 stage pipeline. Out-of-order execution lets the core move past a stalled instruction to extract instruction level parallelism. It’s critical for achieving high performance because cache and memory latency can be significant limiters for modern CPUs."

#RISCV #RISC_V #ComputerArchitecture #CPU #CPUs #Processor #Processors #Hardware #ComputerHardware #Eswin #EC7700X #SiFive #P550

Jure Repinc :linux: :kde:

RISC-V Vector Extension overview
🔗 0x80.pl/notesen/2024-11-09-ris

"The goal of this text is to provide an overview of RISC-V Vector extension (RVV), and compare — when applicable — with widespread SIMD vector instruction sets: SSE, AVX, AVX-512, ARM Neon and SVE.
[…]
The vector extension is quite a huge addition. It adds 302 instructions plus four highly configurable load & store operations."

#RISCV #RISC_V #RVV #ComputerArchitecture #ISA #InstructionSetArchitecture #CPU #CPUs #processor #processors

RISC-V Vector Extension overview

0x80.pl
Greg Lloyd

Great #ConnectionMachine + #Feynman story!

“By the end of that summer of 1983, Richard had completed his analysis of the behavior of the router, and much to our surprise and amusement, he presented his answer in the form of a set of partial differential equations. To a physicist this may seem natural, but to a computer designer, treating a set of boolean circuits as a continuous, differentiable system is a bit strange.”

#computerhistory #computerarchitecture mastodon.scot/@simon_brooke/11

Simon Brooke (@simon_brooke@mastodon.scot)

@wakame@tech.lgbt While thinking about the Connection…

mastodon.scot
Stephen Hoffman

~Forty year old write-up on VAX/VMS virtual and physical addressing from IEEE Computing, for those interested in (old) virtual memory system designs:

home.cs.colorado.edu/~rhan/CSC

Old? While each architecture can have its own unique vietual addressing features and its own wrinkles, even forty years on this stuff all still works basically the same way.

And there’s usually a great big must-be-zero hole in the middle of virtual and physical address spaces until right around the same time that vendors’ work on new processor architecture designs and new architecture extensions begins in earnest.

Right now, nobody really wants to buy 52-bits (ARMv8.2-LPA) or 57-bits (Intel x86-64 5-level) of physical memory, either.

There have been a few systems with a virtual address space smaller than their physical address space, but that has been rare. (e.g. VAX XPA extended physical addressing offered 34-bit physical, with 32-bit virtual.)

And for completeness, here is DEC Standard 32, the VAX Architecture definition:

bitsavers.org/pdf/dec/vax/arch

This copy of DEC Standsrd 32 is ~eight years newer than the article above, too. This refers to XPA and the never-completed VVAX Virtual VAX designs for instance, where the article does not.

#retrocomputers #retrocomputing #VAX #VVAX #digitalequipmentcorporation #RetroComputing #IT #computing #ComputerArchitecture #IEEE

Ana

Spent some time learning about CPU caches over the past few days, now pivoting to something different — operating systems. Yes, I’ve busted out the old dinosaur book.

#Computers #Programming #ComputerArchitecture #OperatingSystems

Ana

Been hyperfocusing on taking notes from this #ComputerArchitecture textbook for the past 6 hours and just took a break. I am very disoriented.

Ashwin Nanjappa 🐘

@ana OMG this brings back strong memories! 😁

I still use it as a reference. But to actually learn new concepts I prefer the more accessible Tanenbaum's textbook.

#ComputerArchitecture

Ana

Spending my Friday night with an old college friend.

#ComputerArchitecture #Computers #Programming