These are public posts tagged with #computerarchitecture. You can interact with them if you have an account anywhere in the fediverse.
On April 2, 1997, AMD released a new CPU. If it succeeded, AMD had a chance at success. If it failed, AMD would probably fail with it. That CPU was the K6, and it revitalized AMD, letting them move to the middle of the market, where margins were high enough to fund its future CPUs. #RetroComputing #TechHistory #ComputerArchitecture #Innovation #TechMilestones #1990sTech https://dfarq.homeip.net/amd-k6-released-april-2-1997/
It allowed AMD to move into the more lucrative middle…
The Silicon Underground¿Algún experto en sistemas operativos o en arquitectura de computadores me puede comprobar que este diagrama es correcto? Lo acabo de crear en @drawio partiendo de varios gráficos de "Sistemas Operativos" de Gary Nutt (Ed. Pearson).
¡Mil gracias!
One of the best interviews on AI and GPUs I've every seen was posted earlier today. Jensen Huang is really super smart in my opinion, and I think this interview is definitely worth watching. I can understand how it was a person like him who turned NVIDIA into a company with a market cap more than 1 trillion USD.
Jensen Huang on GPUs - Computerphile
https://www.youtube.com/watch?v=G6R7UOFx1bw
#NVIDIA #GPU #AI #CUDA #CPU #JensenHuang #ComputerArchitecture
Enjoy the videos and music you love, upload original…
www.youtube.comHey everyone involved in #ComputerScience, are you looking for a #job in #academia?
Aalto University in Finland has several positions open for assistant professors. The topics include #MachineLearning, #Programming, #ComputerArchitecture, #CyberSecurity, #SoftwareEngineering and Human-Computer Interactions.
https://www.aalto.fi/en/department-of-computer-science/assistant-professor-positions
We are looking for multiple assistant professors to…
www.aalto.fiInside SiFive’s P550 Microarchitecture https://old.chipsandcheese.com/2025/01/26/inside-sifives-p550-microarchitecture/
"The P550 is a 3-wide out-of-order core with a 13 stage pipeline. Out-of-order execution lets the core move past a stalled instruction to extract instruction level parallelism. It’s critical for achieving high performance because cache and memory latency can be significant limiters for modern CPUs."
#RISCV #RISC_V #ComputerArchitecture #CPU #CPUs #Processor #Processors #Hardware #ComputerHardware #Eswin #EC7700X #SiFive #P550
RISC-V Vector Extension overview http://0x80.pl/notesen/2024-11-09-riscv-vector-extension.html
"The goal of this text is to provide an overview of RISC-V Vector extension (RVV), and compare — when applicable — with widespread SIMD vector instruction sets: SSE, AVX, AVX-512, ARM Neon and SVE.
[…]
The vector extension is quite a huge addition. It adds 302 instructions plus four highly configurable load & store operations."
#RISCV #RISC_V #RVV #ComputerArchitecture #ISA #InstructionSetArchitecture #CPU #CPUs #processor #processors
“The Costs Of The i386 To x86-64 Upgrade”, Julio Merino (https://blogsystem5.substack.com/p/x86-64-programming-models).
On HN: https://news.ycombinator.com/item?id=41768144 & https://news.ycombinator.com/item?id=41773559
On Lobsters: https://lobste.rs/s/a8klxl/costs_i386_x86_64_upgrade
#Intel #CPU #x86 #Hardware #CISC #RISC #ComputerArchitecture #CodeDensity
“ARM Or x86? ISA Doesn’t Matter” [2021], Chips And Cheese (https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-matter/).
Via HN: https://news.ycombinator.com/item?id=41368004
#ISA #Hardware #CPU #ARM #Intel #AMD #x86 #RISCV #Performance #ComputerArchitecture #InstructionSet
For the past decade, ARM CPU makers have made repeated…
Chips and CheeseRISC-V State of the Union — current highlights and roadmap of RISC-V by RISC-V's chief architect https://yewtu.be/watch?v=_oLVPFQvJbI
Slides: https://riscv-europe.org/summit/2024/media/proceedings/plenary/Tue-11-30-Krste-Asanovic.pdf
#RISCV #RISC #CPU #CPUs #architecture #ComputerArchitecture #processor #processors #ISA #InstructionSetArchitecture #hardware
Great #ConnectionMachine + #Feynman story!
“By the end of that summer of 1983, Richard had completed his analysis of the behavior of the router, and much to our surprise and amusement, he presented his answer in the form of a set of partial differential equations. To a physicist this may seem natural, but to a computer designer, treating a set of boolean circuits as a continuous, differentiable system is a bit strange.”
#computerhistory #computerarchitecture https://mastodon.scot/@simon_brooke/112354279945181945
@wakame@tech.lgbt While thinking about the Connection…
mastodon.scot@spiralganglion CM-1 history
Thank you for posting your thread!
I particularly enjoyed Tamiko Thiel’s 1992 + revised ‘The Design of the Connection Machine’ article.
Both #TheChipLetter & #CompilerExplorer are awesome, if you're interested in #programming, #ComputerArchitecture, #hardware, or #compilers:
"Compiler Explorer", 'Babbage' (https://thechipletter.substack.com/p/compiler-explorer).
Or the 'Matt Godbolt shows us some compiler magic'…
thechipletter.substack.com“Why X86 Doesn’t Need To Die”, Chips And Cheese (https://chipsandcheese.com/2024/03/27/why-x86-doesnt-need-to-die/).
Via HN: https://news.ycombinator.com/item?id=39843531
On Lobsters: https://lobste.rs/s/fufcyo/why_x86_doesn_t_need_die
#Hardware #CPU #x86 #RISC #CISC #ComputerArchitecture #ISA #Performance #Intel #ARM
Hackaday recently published an article titled “Why…
Chips and Cheese~Forty year old write-up on VAX/VMS virtual and physical addressing from IEEE Computing, for those interested in (old) virtual memory system designs:
https://home.cs.colorado.edu/~rhan/CSCI_5573_Fall_2011/Papers/vaxvms.pdf
Old? While each architecture can have its own unique vietual addressing features and its own wrinkles, even forty years on this stuff all still works basically the same way.
And there’s usually a great big must-be-zero hole in the middle of virtual and physical address spaces until right around the same time that vendors’ work on new processor architecture designs and new architecture extensions begins in earnest.
Right now, nobody really wants to buy 52-bits (ARMv8.2-LPA) or 57-bits (Intel x86-64 5-level) of physical memory, either.
There have been a few systems with a virtual address space smaller than their physical address space, but that has been rare. (e.g. VAX XPA extended physical addressing offered 34-bit physical, with 32-bit virtual.)
And for completeness, here is DEC Standard 32, the VAX Architecture definition:
http://www.bitsavers.org/pdf/dec/vax/archSpec/EL-00032-00-decStd32_Jan90.pdf
This copy of DEC Standsrd 32 is ~eight years newer than the article above, too. This refers to XPA and the never-completed VVAX Virtual VAX designs for instance, where the article does not.
#retrocomputers #retrocomputing #VAX #VVAX #digitalequipmentcorporation #RetroComputing #IT #computing #ComputerArchitecture #IEEE
Spent some time learning about CPU caches over the past few days, now pivoting to something different — operating systems. Yes, I’ve busted out the old dinosaur book.
#Computers #Programming #ComputerArchitecture #OperatingSystems
Been hyperfocusing on taking notes from this #ComputerArchitecture textbook for the past 6 hours and just took a break. I am very disoriented.
@ana OMG this brings back strong memories!
I still use it as a reference. But to actually learn new concepts I prefer the more accessible Tanenbaum's textbook.
Spending my Friday night with an old college friend.