I discovered that the processor I was implementing in Ghidra was already implemented. RV32GC is rv32imafc in Ghidra and it was near the end of implementing the instruction set that I found it in a line of text.
@AmpBenzScientist
Fuuuuk it. Damn. Duplicating efforts sucks.
@PawelK It was a learning experience that I was able to laugh about.
@AmpBenzScientist
Its ok. Enjoy. Everybody sometimes fails. Learn from it.
@PawelK It did expose me to nearly all of Ghidra's features.
@AmpBenzScientist
Thats one of my plans to get ghidra disasm on par with gcc+binutils
@AmpBenzScientist
You do c and c++ well too? We could try to sync ghidra with binutils archwise and later head for syncing llvm arch instruction set specs too at least for disassemblers. What would You think?
@PawelK I am good with C and somewhat good with C++. The way the processors are setup in Ghidra is genius. I would definitely be willing to work with you on a project. We also have Python for development. I'm currently learning Rust too.
The results could be useful for many different applications. I would suggest a modular design so that they can be removed or added depending upon the project.
@AmpBenzScientist
Its done so in llvm.
@AmpBenzScientist
Its llvms chief arch is a god. Little genius.
@AmpBenzScientist
Ok ok.