#RustLang on #FPGA ... "#LiteX can generate an SVD file for the SoC, which contains all the registers of the components you added to the SoC. This means that you can use svd2rust to compile this SVD file into a peripheral access crate."

http://pepijndevos.nl/2020/08/04/a-rust-hal-for-your-litex-fpga-soc.html