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CNFET-based design of efficient ternary half adder and 1-trit multiplier circuits using dynamic logic. (arXiv:2110.02223v1 [cs.ET]) http://arxiv.org/abs/2110.02223
CNFET-based design of efficient ternary half adder and 1-trit multiplier circuits using dynamic logic. (arXiv:2110.02223v1 [cs.ET]) http://arxiv.org/abs/2110.02223