arXiv Computer Science @arxiv_cs@qoto.org

Accelerating GenAI Workloads by Enabling RISC-V Microkernel Support in IREE https://arxiv.org/abs/2508.14899 #cs.AR #cs.AI

Efficient Switchable Safety Control in LLMs via Magic-Token-Guided Co-Training https://arxiv.org/abs/2508.14904 #cs.CL #cs.AI

Privacy Preserving Inference of Personalized Content for Out of Matrix Users https://arxiv.org/abs/2508.14905 #cs.IR #cs.AI #cs.LG

Collaborative Filtering using Variational Quantum Hopfield Associative Memory https://arxiv.org/abs/2508.14906 #cs.IR #cs.AI #cs.ET #cs.LG

Improving Chip Design Enablement for Universities in Europe -- A Position Paper https://arxiv.org/abs/2508.14907 #cs.AR

Preliminary Ranking of WMT25 General Machine Translation Systems https://arxiv.org/abs/2508.14909 #cs.CL

Closing the Performance Gap in Generative Recommenders with Collaborative Tokenization and Efficient Modeling https://arxiv.org/abs/2508.14910 #cs.IR #cs.LG

Personalized Recommendations via Active Utility-based Pairwise Sampling https://arxiv.org/abs/2508.14911 #cs.IR #cs.LG

Multimodal Recommendation via Self-Corrective Preference Alignmen https://arxiv.org/abs/2508.14912 #cs.IR

Bridging the Culture Gap: A Framework for LLM-Driven Socio-Cultural Localization of Math Word Problems in Low-Resource Languages https://arxiv.org/abs/2508.14913 #cs.CL

Deep Learning for School Dropout Detection: A Comparison of Tabular and Graph-Based Models for Predicting At-Risk Students https://arxiv.org/abs/2508.14057 #cs.LG

EvoVerilog: Large Langugage Model Assisted Evolution of Verilog Code https://arxiv.org/abs/2508.13156 #cs.AR #cs.AI

Image2Net: Datasets, Benchmark and Hybrid Framework to Convert Analog Circuit Diagrams into Netlists https://arxiv.org/abs/2508.13157 #eess.IV #cs.AR #cs.AI #cs.CV

Fine Grain 3D Integration for Microarchitecture Design Through Cube Packing Exploration https://arxiv.org/abs/2508.13158 #cs.AR #cs.ET

Accelerating Transistor-Level Simulation of Integrated Circuits via Equivalence of RC Long-Chain Structures https://arxiv.org/abs/2508.13159 #cs.AR #cs.PF

Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits https://arxiv.org/abs/2508.13160 #cs.AR #cs.ET

Piano: A Multi-Constraint Pin Assignment-Aware Floorplanner https://arxiv.org/abs/2508.13161 #cs.AR #cs.AI

FedChip: Federated LLM for Artificial Intelligence Accelerator Chip Design https://arxiv.org/abs/2508.13162 #cs.AR #cs.LG

Sustainable AI Training via Hardware-Software Co-Design on NVIDIA, AMD, and Emerging GPU Architectures https://arxiv.org/abs/2508.13163 #cs.AR #cs.AI #cs.DC #cs.LG

A novel geometric predictive algorithm for assessing Compressive Elastic Modulus in MEX additive processes, based on part nonlinearities and layers stiffness,validated with PETG and PLA materials https://arxiv.org/abs/2508.13164 #cs.CE