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On-Chip Implementation of Pipeline Digit-Slicing Multiplier-Less Butterfly for Fast Fourier Transform Architecture. (arXiv:1808.02521v1 [eess.SP]) http://arxiv.org/abs/1808.02521
On-Chip Implementation of Pipeline Digit-Slicing Multiplier-Less Butterfly for Fast Fourier Transform Architecture. (arXiv:1808.02521v1 [eess.SP]) http://arxiv.org/abs/1808.02521