Let's boot Apache #NuttX Real-Time Operating System on a 64-bit #RISCV Device (QEMU Emulator) ... And study the Boot Code inside NuttX
Article: https://lupyuen.codeberg.page/articles/riscv.html?1
Here's how we run Apache #NuttX RTOS on 64-bit #RISCV QEMU Emulator
Article: https://lupyuen.codeberg.page/articles/riscv.html?1#boot-nuttx-on-64-bit-risc-v-qemu
Emulating RV64GC with #RISCV QEMU Emulator
Article: https://lupyuen.codeberg.page/articles/riscv.html?2#qemu-emulator-for-risc-v
What happens when Apache #NuttX RTOS boots on #RISCV QEMU Emulator? Let's check the RISC-V Disassembly
Article: https://lupyuen.codeberg.page/articles/riscv.html?3#qemu-starts-nuttx
Let's walk through the #RISCV Boot Code in Apache #NuttX RTOS
Article: https://lupyuen.codeberg.page/articles/riscv.html?4#risc-v-boot-code-in-nuttx
How we Disable Interrupts in #RISCV Assembly ... And a curious way to loop forever
Article: https://lupyuen.codeberg.page/articles/riscv.html?4#disable-interrupts
Adapting 32-bit Assembly Code for 64-bit … Easy peasy for #RISCV!
Article: https://lupyuen.codeberg.page/articles/riscv.html?4#32-bit-vs-64-bit-risc-v
Quick tour of #RISCV Instructions
Article: https://lupyuen.codeberg.page/articles/riscv.html?4#other-instructions
Here's the complete list of #RISCV Instructions
Article: https://lupyuen.codeberg.page/articles/riscv.html?4#other-instructions
Up Next: Apache #NuttX RTOS on Star64 JH7110 #RISCV SBC!
Article: https://lupyuen.codeberg.page/articles/riscv.html?5#jump-to-start
@lupyuen Hi Lup thx for your awesome posts about #nuttx on embedded systems! I'm currently doing some research for a students tutorial and asking myself if GPIO can be simulated with #qemu and #riscv running #nuttx. Do you have any ideas on how to simulate this using the emu and how must #nuttx be configured to provide the /dev/gpioXX device?
@nekron Thanks :-) I don't think NuttX on RISC-V QEMU supports GPIO. That's because NuttX is hardcoded to use the "Generic Virtual Platform (virt)", which doesn't support GPIO:
https://lupyuen.codeberg.page/articles/riscv.html#qemu-emulator-for-risc-v
We might need to switch to the PolarFire Icicle Emulator for QEMU:
https://www.qemu.org/docs/master/system/riscv/microchip-icicle-kit.html
And boot NuttX for PolarFire Icicle:
https://nuttx.apache.org/docs/latest/platforms/risc-v/mpfs/boards/icicle/index.html
Sounds complicated though.
Loading the Vector Table in #RISCV Assembly
Article: https://lupyuen.codeberg.page/articles/riscv.html?4#load-interrupt-vector