Let's boot a tiny bit of Apache #NuttX Real-Time Operating System ... On @PINE64 Star64 64-bit #RISCV SBC (Based on StarFive JH7110 SoC)

Article: https://lupyuen.codeberg.page/articles/nuttx2

We'll take Apache #NuttX RTOS for QEMU Emulator ... And run it on #Star64 JH7110 #RISCV SBC

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#start-with-qemu-emulator

Here's how we print to the Serial Console on QEMU #RISCV Emulator ... By writing to the UART Address

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#print-to-qemu-console

Printing to QEMU Console ... In #RISCV Assembly

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#print-to-qemu-console

All about the UART Controller on #Star64 JH7110 #RISCV SBC

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#uart-controller-on-star64

To boot Apache #NuttX RTOS on #Star64 JH7110 SBC ... We need this #RISCV Linux Kernel Header

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#risc-v-linux-kernel-header

Magical Start Address of Apache #NuttX RTOS ... On #Star64 JH7110 #RISCV SBC

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#start-address-of-nuttx-kernel

Watch what happens when we boot Apache #NuttX RTOS on #Star64 JH7110 #RISCV SBC

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#boot-nuttx-on-star64

Apache #NuttX RTOS boots a tiny bit on #Star64 JH7110 #RISCV SBC 🎉 ... And crashes

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#boot-nuttx-on-star64

Apache #NuttX RTOS fails to get the Hart ID (CPU ID) ... On #Star64 JH7110 #RISCV SBC

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#nuttx-fails-to-get-hart-id

#RISCV Code runs at 3 Privilege Levels: Machine, Supervisor or User

Article: https://lupyuen.codeberg.page/articles/nuttx2.html#risc-v-privilege-levels