All Vendors Are Bastards
apparently in the Lattice ECP5 line of FPGAs, the 12F and 25F devices actually only differ in the JTAG product ID they present, and the vendor toolchain then implements the limit of "the 12F is about half as big as a 25F" in software.
moreover, I'm told this is common practice across all the vendors.
the nextpnr open source toolchain for the ECP5 conveniently "forgets" to implement this "feature"
moreover, I'm told this is common practice across all the vendors.
the nextpnr open source toolchain for the ECP5 conveniently "forgets" to implement this "feature"
@mei There is no defect in the "disabled" half, nor any slow path that would force you to decrease the speed of your whole design?
@miermont nope, the vendor toolchain literally lets you use any subset of the 25K logic elements as long as it's at most 12K logic elements in total
