implemented a script for #GlasgowInterfaceExplorer that lets you discover the connectivity of any IC with JTAG boundary scan, provided you can give the IC an arbitrary stimulus (here done by using a glasgow output connected to a needle point probe)
@whitequark Potentially naive question: why not the other way round (have the IC configure everything as outputs, toggle them at seminrandom, and observe what the probe sees)? Is that not in general possible via JTAG?
@whitequark Doesn't the same apply to the signal you're providing via the external probe?
@robryk to an extent, yes. but there are two nuances:
1. you control what you're probing, not just blasting the entire board. in the case in the video, I know there is nothing but the FPGA connected to those nets, therefore it is 100% safe
2. because of (1), if I put this into an applet and someone fucks up their board, I would not be at fault :)
@robryk because something else on the board might object to this by self-destructing