@PawelK I think VDHL or Verilog would work better for that kind of work. That code and a beast of an FPGA are going to be the proving grounds for a custom core. The architecture is so flexible that the ISA for the core I worked with was wrong in the memory mapping.

Even the D1 core doesn't make sense as anything but a 4x4 configuration. It just works as a single core. It's absurd. You want the fastest embedded controller? RV64GC quad cores with custom extensions and more cache. It could fetch information faster than an interface could handle without issue.

It's so crazy but power isn't going to be an issue. China used OpenSPARC for accelerators that out performed the Xeon Phis they were using. Then Ali introduced the Xuantie C910 which is RISC-V. SiFive barely out performs it and it sounds like it is a derivative of the C910.

This is what real competition and progress looks like. In two decades the architecture has gone from curiosity to Super Computer applications. This is the power of an open standard. The only thing Intel and AMD have discovered in the same amount of time is how they are going to have to swap over or die off.

Hopefully RISC-V graphics are coming along well because it's time to end the plague of Red, Blue and Green. With 400w cards being estimated, they are coughing up blood. No one will miss them. They can't mine crypto anymore.