Watch how we connect Level 2 Page Table back to Level 1 in #RISCV Sv39 Memory Mgmt Unit
Article: https://lupyuen.codeberg.page/articles/mmu.html#connect-level-1-to-level-2
Automated Daily Build: Apache #NuttX RTOS for #Ox64 BL808 #RISCV SBC
Source: https://github.com/lupyuen/nuttx-ox64?tab=readme-ov-file#nuttx-automated-daily-build-for-ox64
Here's the Level 1 Page Table for #RISCV Sv39 Memory Management Unit
Article: https://lupyuen.codeberg.page/articles/mmu.html#huge-chunks-level-1
Apache #NuttX RTOS runs OK on #RISCV Sipeed M1s Dock BL808! 🎉
Source: https://www.hackster.io/lupyuen/8-risc-v-sbc-on-a-real-time-operating-system-ox64-nuttx-474358
Protecting the RAM and I/O Memory inside our #Ox64 BL808 SBC
Article: https://lupyuen.codeberg.page/articles/mmu.html#memory-protection
Apache #NuttX RTOS loads the Initial RAM Disk (initrd) in 2 ways
Article: https://lupyuen.codeberg.page/articles/ox2.html#appendix-initial-ram-disk
#RISCV BL808 Peripherals look mighty similar to BL602
Article: https://lupyuen.codeberg.page/articles/ox2.html#appendix-uart-driver-for-ox64
Fixing the Memory Map for Apache #NuttX RTOS on #Ox64 BL808 SBC
Article: https://lupyuen.codeberg.page/articles/ox2.html#appendix-memory-map-for-ox64
Everything that happens when Apache #NuttX RTOS boots on #Ox64 BL808 SBC
Article: https://lupyuen.codeberg.page/articles/ox2.html#appendix-nuttx-boot-flow
Apache #NuttX RTOS needs an Initial RAM Disk to boot on #Ox64 BL808 SBC
Article: https://lupyuen.codeberg.page/articles/ox2.html#initial-ram-disk-is-missing
#RISCV Platform-Level Interrupt Controller is strangely located in high memory for #Ox64 BL808 SBC
Article: https://lupyuen.codeberg.page/articles/ox2.html#add-plic-to-memory-map
Fixing the #RISCV Exceptions for Apache #NuttX RTOS on #Ox64 BL808 SBC
Article: https://lupyuen.codeberg.page/articles/ox2.html#handle-risc-v-exceptions
IoT Techie and Educator / Apache NuttX PMC