#RISCV Platform-Level Interrupt Controller (PLIC) controls the forwarding of Peripheral Interrupts to our CPU
Article: https://lupyuen.codeberg.page/articles/plic2.html#platform-level-interrupt-controller
Here's the UART Interrupt Number for #Ox64 BL808 SBC
Article: https://lupyuen.codeberg.page/articles/plic2.html#uart-interrupt
Here's how we init the #RISCV Interrupts in the Platform-Level Interrupt Controller (PLIC)
Article: https://lupyuen.codeberg.page/articles/plic2.html#initialise-the-interrupts
How we set the #RISCV Interrupt Priority and Threshold for Platform-Level Interrupt Controller (PLIC)
Article: https://lupyuen.codeberg.page/articles/plic2.html#set-the-interrupt-priority
We configure #RISCV Interrupts for #Ox64 BL808 SBC at Hart 0, Supervisor Mode
Article: https://lupyuen.codeberg.page/articles/plic2.html#hart-0-supervisor-mode
How we handle a #RISCV Interrupt with Platform-Level Interrupt Controller (PLIC)
Article: https://lupyuen.codeberg.page/articles/plic2.html#handle-the-interrupt
Dispatching and Completing the UART Interrupts ... On #Ox64 BL808 #RISCV SBC with Apache #NuttX RTOS
Article: https://lupyuen.codeberg.page/articles/plic2.html#dispatch-the-interrupt
Remember to enable MMU Strong Ordering on #Ox64 BL808 and #RISCV T-Head C906 ... Or strange things will happen 😬
Article: https://lupyuen.codeberg.page/articles/plic2.html#trouble-with-interrupt-priority
We copied the #NuttX UART Driver from PineCone BL602 to #Ox64 BL808 ... And it works! 👍
Article: https://lupyuen.codeberg.page/articles/plic2.html#appendix-uart-driver-for-ox64
@lupyuen It's nice to see someone using the correct nomenclature.
Enabling #RISCV Interrupts in the Platform-Level Interrupt Controller (PLIC)
Article: https://lupyuen.codeberg.page/articles/plic2.html#enable-the-interrupt